Senior Engineer, Design Verification

Analog Devices is seeking a Senior Engineer, Design Verification to contribute to the verification of complex designs and sub-systems using leading edge verification methodologies. The role will be responsible for technically mentoring junior verification engineers, architecting testbenches, and defining test plans and verification methodologies.

Requirements

• Verification of complex designs and sub-systems using leading edge verification methodologies
• Contribute and influence the decisions on methodologies to be adopted for the verification
• Technically mentor and guide junior verification engineers on SoC Verification
• Architect the testbench and develop in UVM or Formal based verification approaches
• Integrate the block testbench in chip-level UVM environment and verify integration
• Define test plans, tests, and verification methodology for block / chip-level verification
• Work with the design team in generating test-plans and closure of code and functional coverage
• Continuous interaction with analog co-sim and firmware team in enabling top-level chip verification aspects
• Support post-silicon verification activities of the products working with design, product evaluation and applications engineering team

Benefits

• Competitive salary and benefits package
• Opportunity to work with a global leader in the semiconductor industry
• Collaborative and dynamic work environment
• Professional development and growth opportunities