SoC DFT Engineer

This role involves the complete design of a semiconductor solution through DFT, encompassing architecture development, infrastructure implementation, and test vector generation. Responsibilities include structural testing, coverage analysis, design verification, and collaboration with various teams to ensure successful implementation. The position is collaborative and requires a focus on ensuring high-quality, functional DFT components.

Requirements

• BS in Engineering or related field
• 3+ years of relevant industry experience
• Knowledge of industry standards in DFT (e.g., ATPG, JTAG, MBIST)
• Verilog or VHDL experience
• Knowledge of design verification methodologies
• Experience debugging Compressed ATPG patterns, MBIST, and JTAG/1500 related issues
• Experience with STA constraints development and analysis
• Ability to conduct experiments and analyze data during silicon debug
• Understanding of DFT and design tools