Lead Design Engineer
Cadence Design SystemsShanghai, China
Posted December 23, 2025
Full Time
About the Company
We hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Description
We're looking for a Lead Design Engineer to join our team at Cadence in Shanghai. As a lead engineer, you will be responsible for designing, developing, and productizing protocol products. You will work on complex problems related to protocol or system integration level issues, electrical or timing closure issues, RTL design or verification methodologies.
Requirements
- MSEE or equivalent degree
- 3 or more years of experience in logic design and debug
- Excellent communication skills
- RTL design experience using Verilog
- Experience in using RTL verification tools and flows
- Experience in FPGA design for Xilinx products (recommended)
- UVM verification experience (desired)
- Experience with scripting languages like Perl, TCL C-shell (desired)