Principal Design Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We're doing work that matters. Help us solve what others can't.

Requirements

• Design Verification for interconnect IP
• Relevant experience in interconnect and subsystems is strongly preferred
• Crafting verification plans and executing on those plans to verify highly complex and configurable designs.
• Responsible for coverage collection and closure
• Work closely with cross functional teams (DV/Arch/Design/FW) to identify coverage scope