Product Engineer

Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry.

Requirements

• Develop characterization test plans using established methodologies targeted on chip IP functions and features.
• Execute characterization of target chip IP features using wafer-level ATE, package-level ATE, and package-level bench platforms across process, temperature, and voltage conditions.
• Apply statistical analysis on collected characterization data to define key product datasheet parameters and report out results.
• Identify and analyze to root cause product marginalities, communicating and coordinating root cause closure to appropriate cross-functional team (eg. Applications Engineering, Design Engineering, etc.)
• Design and implement test circuits using FPGA fabric and embedded IP.
• Develop bench automation and data collection scripts and programs.
• Design and develop ATE and bench HW.
• Drive all product issues to resolution.
• Plan and execute testing of samples (ie. AS, ES), ensuring timely delivery of tested samples to internal and external customers.
• Analyze and report out on test yield and test time.