20371 - RTL Design Engineer

Qualitest is a leading AI-powered Quality Engineering company hiring a RTL Design Engineer to define, implement, and optimize digital logic designs at the Register Transfer Level (RTL) for complex ASIC/SoC systems.

Requirements

• Translate architectural specifications into efficient and synthesizable RTL designs (SystemVerilog).
• Develop detailed microarchitecture specifications for functional blocks or subsystems.
• Integrate IP blocks and ensure seamless connectivity and data flow across the SoC.
• Run design checks (lint, CDC, synthesis readiness) and support backend implementation.
• Collaborate with verification teams to define test plans, review coverage, and debug design issues.
• Support validation and bring-up teams during silicon bring-up and debug phases.
• Optimize designs for power, area, and timing while maintaining functional integrity.

Benefits

• Grow your career in a stable, innovative environment
• Collaborate closely with clients to deliver smart, high-quality solutions
• Make an impact in a dynamic, learning-driven environment
• Be part of a human, value-driven organization that cares