We are looking for a Senior Digital Design Engineer to join our team at Riverlane, a company working on quantum computing. The role involves developing a multi-FPGA, low-latency, high throughput system for complex operations. You will work with a team of mathematicians, physicists, and engineers to achieve innovative solutions.
Requirements
- Experience with state-of-the-art FPGA platforms (e.g. AMD/Xilinx MPSoCs/RFSoCs, Altera Stratix 7 or Stratix 10)
- Experience with ASIC environments (<48nm)
- Proven professional experience in at least one of the following areas: Implementation of modern classical decoders on FPGA/ASIC e.g. LDPC, turbo-codes; Architecture of System on Chip solutions, with at least one CPU and custom accelerators; Large-scale, complex systems on FPGA/ASIC
- Proven capability to test, debug and improve complex systems
- Ability to convert product requirements into technical specifications to document and share your work
- A curious nature and a passion for learning and continuous improvement
- Excellent communication skills, with the ability to work both independently and collaboratively as part of a team
Benefits
- A comprehensive benefits package, including annual bonus scheme, private medical insurance, life insurance, a contributory pension scheme (and much more)
- Equity so that our team can share in the long-term success of Riverlane
- 28 days annual leave (plus bank holidays) and enhanced family leave
- A diverse work environment that brings together experts in many fields (including software and hardware development, quantum information theory, physics, maths and many more) and over 20 different nationalities
- A learning environment that encourages individual, team and company growth and learning, including an annual training and conference budget