[CDI] Senior verification engineer

SiPearl is a European fabless designer of secure high-performance energy-efficient CPUs. The company is looking for a Senior Verification Engineer to design and drive the architecture of their microprocessor verification platform, lead a team of engineers, and collaborate with various teams. The role requires a minimum of 7-10 years of experience in ASIC/SoC verification, leadership, and excellent communication skills.

Requirements

• Minimum 7–10 years of experience in ASIC/SoC verification, including 3–5 years as an architect or lead
• Proficiency in SystemVerilog/UVM, VHDL/Verilog, C/C++, Python/TCL scripting
• Proven experience in team management and leading technical projects
• Strong understanding of SoC architectures and communication protocols (AXI, AHB, PCIe, Ethernet...)
• Leadership, ability to bring a team together, and excellent communication skills

Benefits

• annual bonus
• meal vouchers (60% covered by SiPearl)
• health insurance (70% covered by SiPearl)
• unlimited access and pre-paid sessions with a practitioner of your choice on our mental health partner app, moka.care
• technical, linguistic and personal development training
• BSPCE