
Synopsys is a leader in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.
We are looking for an experienced ASIC Digital Design Engineer to lead the design and verification of complex ASIC blocks and systems at Synopsys in Munich, Germany. The ideal candidate will have a proven track record in RTL design and verification, excellent communication skills, and a strong analytical and problem-solving mindset.
Synopsys is a leader in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.