ASIC Verification, Principal Engineer
Synopsys IncEngland, United Kingdom
Posted February 4, 2026
Full Time
About the Company
Synopsys is a global leader in electronic design automation and semiconductor intellectual property, offering end‑to‑end engineering solutions that span silicon design to complete systems. The company specializes in silicon design, IP, simulation, and analysis tools, as well as design services that accelerate the development of AI‑powered products. By partnering closely with customers across diverse industries, Synopsys enhances R&D productivity and empowers rapid innovation. Its reputation for industry‑leading technology, comprehensive software portfolio, and a collaborative culture makes it a top choice for engineers seeking to shape tomorrow’s technology.
Job Description
We are seeking an experienced ASIC Digital Verification Engineer to join our team. As a Principal Engineer, you will design, implement, and optimize verification environments to ensure the correctness of Interface IP protocols. You will work collaboratively with cross-functional teams and stakeholders to deliver high-quality, reliable ASIC designs that meet customer specifications.
Requirements
- Extensive experience in ASIC digital verification, specifically with Interface IP protocols, such as PCIe, CXL, DDR, Ethernet, AMBA (CHI, AXI, AHB, APB).
- Proficiency in System Verilog, SVA and UVM methodologies.
- Strong understanding of digital design and verification concepts.
- Familiarity with wider digital ASIC and IP development flow, including RTL design through synthesis.
- Experience with simulation tools such as VCS, Model Sim, or similar.
- Strong analytical and problem-solving skills, with the ability to tackle complex and unique design challenges.
- Excellent communication skills, with the ability to effectively collaborate with cross-functional teams and stakeholders.
Benefits
- Comprehensive range of health, wellness, and financial benefits
- Total rewards include both monetary and non-monetary offerings