Staff Engineer, ASIC Design Methodology

Tenstorrent is looking for an ASIC Design Methodology Engineer to advance their design infrastructure and flows across RTL development, verification, and physical implementation. This role is ideal for engineers who thrive on improving design quality, enabling scalability, and automating methodologies that accelerate silicon success.

Requirements

• Develop and maintain ASIC design methodologies and infrastructure for RTL development and integration.
• Own and evolve static code analysis (Lint, CDC, RDC, DFT) and RTL-netlist logic equivalency design methodologies
• Develop synthesis timing constraints (SDC) and low power design specifications (UPF)
• Support RTL-to-GDS flow enablement, ensuring clean handoffs and sign-off readiness.
• Collaborate with EDA vendors and internal tool owners to optimize performance, quality, and runtime.

Benefits

• Competitive compensation package and benefits
• Equal opportunity employer