Senior Staff HW EDA Infrastructure/Methodology Engineer

We are seeking an experienced engineer to drive the next-generation infrastructure, methodology, and automation that will accelerate our ASIC design cycle.

Requirements

• 7+ years building and maintaining ASIC flows in production (from RTL through sign-off) with proven tapeout experience.
• Deep knowledge of at least two EDA domains: simulation, hardware emulation, logic synthesis, P&R, STA, formal/equiv, CDC/RDC, DFT/ATPG, physical verification, or power sign-off.
• Strong coding skills in Python and one of Tcl/C++; rigorous software practices (version control, code review, testing).
• Experience building CI/CD style automation for hardware (e.g., Jenkins/GitHub Actions, BuildKite, Bazel, containers).
• Comfortable with Linux at scale and job schedulers (e.g., LSF/Slurm/Kubernetes).
• Ability to translate engineer pain points into reliable tools with excellent UX and documentation.

Benefits

• Competitive base salary
• Equity
• Benefits