IC Package Design Engineer

This IC Package Design Engineer role focuses on implementing the physical design of packages and modules for various chips, including SoC, Memory, RF, and cellular technology. It involves interface coordination with multi-functional groups, optimizing pinouts, and driving packaging advancements through analysis and new tool development. The role requires strong understanding of package conventions, assembly, and high-speed interfaces.

Requirements

• BS and 3+ years of relevant industry experience
• Proven fundamentals in electrical/material/thermal/mechanical engineering
• Familiarity with various sophisticated package configurations and assembly/substrate technology
• Experience in package design and proficiency in Cadence Allegro/Mentor Xpedition
• Basic understanding of high-speed interfaces (DDR, PCIe, NAND) and package models
• Understanding of substrate manufacturing and material properties
• Solid understanding of high-speed layout constraints, design rules, and material properties
• Familiarity with CAM350/Valor or Calibre and CAD experience

Benefits

• Comprehensive medical and dental coverage
• Retirement benefits
• Discounted products and free services
• Tuition reimbursement
• Reimbursement for certain educational expenses